Oryon evolves with 100+ upgrades, marking Qualcomm’s bold CPU reinvention
Pradeep Kanapathipillai, VP of CPU Engineering, champions clean-sheet design, prioritizing scalability, security, and efficiency
Qualcomm targets PC leadership through custom architecture rooted in mobile learnings
At Qualcomm’s Snapdragon X2 Elite architecture deep dive, Pradeep Kanapathipillai takes his seat with the calm confidence of someone who has spent more than twenty years designing the hidden machinery inside processors.
SurveyDuring my interview, Pradeep is soft-spoken, technically surgical, and visibly comfortable debating cache hierarchies the way most people discuss lunch. As Vice President of CPU Engineering, Pradeep and his team is responsible for the Oryon CPU, Qualcomm’s custom architecture powering its most ambitious leap into PC compute with the Snapdragon X2 Elite chip. Beneath Pradeep’s understated manner is a story of architectural reinvention that rarely happens in the semiconductor world, especially at this scale.
When I ask what has changed between the first-generation Oryon CPU and the latest one inside X2 Elite, he doesn’t hesitate. “Yes, dramatically changed,” he says, outlining a list that would make most engineering teams grimace. “Over 100+ architecture and feature enhancements just in the CPU subsystem alone,” covering everything from IPC and ISA improvements to power-efficiency optimizations, plus the addition of SME – “the matrix accelerator I spoke about.”
When our conversation drifts to the perennial RISC vs CISC debate, Pradeep’s take on the age-old philosophical battleground is more like a footnote. “The ISA differences… offer certain advantages, such as simplicity in the micro-code engine,” he acknowledges, but insists those differences “pale in comparison to everything else we need.”
In Pradeep’s view, the gap people obsess over has long since narrowed, becoming “a very small percentage in terms of ISA differences between RISC vs CISC.” What he’s saying is that the real competition now lies in how well you orchestrate memory paths, prediction engines, security layers, and power states – the deep plumbing of modern CPUs.
From mobile to AI PC: A CPU’s journey
If Oryon’s DNA feels shaped by Qualcomm’s mobile heritage, that’s no accident. Moving from mobile SoCs to laptop-class compute sounds straightforward in a keynote, but Pradeep frames it as a multi-year migration.
“Learnings had to do with energy efficient computing, low power design,” he says, but warns that “there isn’t a silver bullet… it all boils down to hard engineering choices,” distributed across “over a 1000 features” from fine-grained clock gating to microarchitectural tweaks. Yet TDP – power envelope – is where the transition truly changes the rules.
Also read: Snapdragon X2 Elite chip: Qualcomm is serious about AI PC domination!
Phones live around 8 watts. PCs begin “from 10-watt onwards and upwards to many tens of watts.” To survive in that world, a CPU must expand in both directions. “There are new architectures that need to be built in to harvest those higher TDPs,” he explains, while still enabling modes that operate “at a very energy efficient manner” when workloads don’t need a performance sprint.
You see this duality most clearly in the X2 Elite Extreme SKU – the one with 18 cores and 5-GHz headroom, designed to stretch across thin-and-light laptops and high-end compute machines. Pradeep explains that supporting “differing TDPs… for different product SKUs” means architecting a suite of power-management systems that manufacturers can tune at product launch or manufacturing time.
He points to “limit management” – setting power, thermal, and current ceilings – as one example, and adds, “There are at least 25 such major architectures that have to be built into a high performance silicon.” Hidden behind every headline clock speed is a complex system preventing the hardware from outrunning physics.
Part of that discipline involves physical placement – the dark art of SoC floorplanning. Pradeep describes it in matter-of-fact terms, but the trade-offs are brutal. “Latency to DRAM and all the intermittent cache… matters greatly,” he says. Prime cores, aiming for the highest performance, sit closer to DRAM through more direct paths.
“The latency to DRAM matters for the Prime cores more than the Performance cores,” so floorplanning teams position clusters based on proximity to “the coherence fabric and system level cache and DRAM… to give priority to one versus the other.” Every millimeter on a die represents a compromise: power, noise, thermals, timing, and budget, all wrestling beneath the surface.
Different from Intel, Apple and competition
One architectural choice that stands out is the absence of efficiency cores – the small, low-power cores that Apple and Intel use heavily. Qualcomm took a different route.
“The power performance profile for the Performance cores is higher than that of some of the E-cores you might be referring to,” Pradeep says. For laptops and PCs, he believes, “It makes sense to have higher performance cores than true low performance energy efficient cores.” Instead of mixing big and little cores, Qualcomm built high-performance cores that can scale down efficiently on their own. It’s a bet that laptop workloads, unlike smartphone ones, reward consistency over asymmetry.
But the heart of Oryon’s story – and the part Pradeep speaks about with the quiet pride of someone who knows how rare the opportunity is – is that Oryon was built from scratch. “We start with a clean sheet of paper and the goal is to bring out a market leading CPU,” he says, one that must compete with “Intel and AMD who have been in this business for 20+ years.”
Clean-sheet CPU design is one of the few remaining engineering endeavours where you still get to rewrite assumptions instead of inheriting them. “There aren’t that many opportunities to design a CPU from the ground up,” he notes, and it allows them to “microarchitect to ensure there aren’t any side-channel vulnerabilities” or legacy baggage. After five years, he sums up the journey in an understated but telling phrase: “It’s been net positive.”
Security is one area where scratch-pad freedom makes a difference. The Oryon CPU inside X2 Elite brings a fresh architectural foundation: “The empty architecture is new,” he says. Qualcomm has “strengthened” side-channel mitigations, reinforced MMU protections through newer features, and “strengthened” several cryptographic ciphers. Much of this work is invisible by design – security is a subsystem that only gets attention when something breaks – but the investment signals that Qualcomm views trust as a first-class competitive feature.
Also read: Also read: Qualcomm introduces Snapdragon X2 Elite and X2 Elite Extreme putting Intel and AMD on alert
Oryon also isn’t confined to PCs. Qualcomm’s product portfolio spans phones, XR devices, automotive systems, and industrial hardware. According to Pradeep, “We share a lot of common technologies across business units, but customize it for various markets.” In other words, Oryon isn’t a product, but a framework. A piece of architectural DNA that can express itself differently depending on the thermal, latency, and cost constraints of each domain.
Advice for young engineers in India and the world
When I ask him what advice he would give to India’s young engineers aspiring to enter the semiconductor field, he shifts effortlessly from architect to mentor. The industry may be decades old, but Pradeep insists expertise is more valuable than ever.
“You have to be an expert in at least one subsystem such as CPU, NPU, GPU,” he says, while also building “a good amount of breadth” across SoC components. Understanding the infrastructure behind the architecture – physical design, verification, custom circuits – matters just as much as the glamorous top-level blocks. And despite newer technologies making headlines, he’s clear-eyed about silicon’s longevity: VLSI, he says, “will be in demand for a long time to come.”
The Snapdragon X2 Elite is more than a product milestone for Qualcomm. It’s the outcome of a company willing to rethink its compute ambitions, and a team willing to redraw the map instead of updating the legend. And at the center of that effort is Pradeep Kanapathipillai – an engineer who speaks in quiet, exacting phrases, but whose work signals something louder: Qualcomm’s CPU story is only beginning to write itself, and the next clean sheet of paper may already be on his desk.
Follow Us
Jayesh Shinde
Executive Editor at Digit. Technology journalist since Jan 2008, with stints at Indiatimes.com and PCWorld.in. Enthusiastic dad, reluctant traveler, weekend gamer, LOTR nerd, pseudo bon vivant. View Full Profile
