Not just design: Marvell’s Navin Bishnoi on next chapter of Indian semicon and AI datacentre story

For three decades, the story of India’s contribution in semiconductors has almost entirely been viewed from a design lens. For that task of designing chips, we have brilliant engineers, deep talent pools, and the world’s R&D centres quietly turning ideas into circuits. They then simply hand those circuits off to be built somewhere else. 

That framing is now starting to look outdated, and few people are better positioned to explain the shift underway than Navin Bishnoi, VP and India Country Manager at Marvell Technology and currently chairs the India Electronics and Semiconductor Association (IESA). 

A fabless designer of AI and data-infrastructure silicon, Marvell’s one of the key custom-ASIC partners to the world’s hyperscalers, and it just completed 20 years in the country, mirroring India’s own evolution from offshore design centre hub to an aspiring product nation. In an exclusive chat, Bishnoi laid out why he believes India’s semiconductor journey is moving “from execution to product ownership,” how the AI boom is forcing a fundamental rewiring of the datacentre, and why the rush of every big-tech firm to build its own custom chip is an incredible opportunity for semiconductor companies and India. Edited excerpts follow:

Q) Congrats to Marvell team for 20 years in India. What’s your sense of enthusiasm around the Indian semiconductor mission?

Navin Bishnoi: Marvell is a fabless chip design company primarily focused on AI and data infrastructure. We all generate data around us, and as we manage this data, we need to process it, move it, store it, and keep it secure. That is Marvell’s mission: to create semiconductor solutions that can process, move, store, and secure data faster than anyone else in the ecosystem. Our products are processor in nature, networking in nature, and partly storage and security, primarily catering to the datacentre, cloud, enterprise cloud, and AI markets.

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I came to Marvell through an acquisition, which is how the custom silicon business came to Marvell. We were the IBM custom ASIC team, which was sold to GlobalFoundries and then came to Marvell. We have completed 20 years in India. What started as a small design center has grown – especially over the last six to seven years – to where we are now part of every technology, every product, and every solution we put together for the customer. And with the focus over the last five years on building a semiconductor hub and ecosystem in India, we have been working with the government to align, review, and give feedback on policies, incentives, and ecosystem focus areas, as well as investing in creating hubs for startup talent.

Q) Where does India fit into the global semiconductor value chain beyond just being a design hub?

Navin Bishnoi: We have been in the ecosystem for four decades, and a large part of that focus has been on the design ecosystem. What we are seeing over the last five years is a balance on accelerating the manufacturing footprint, primarily driven by resilience and overall value chain improvement. We are seeing an acceleration toward end-to-end product creation – right from idea and architecture to design, validation, systems, and software. We need to create more differentiated or foundational IP, have more system-level innovation, and leverage both the local and global ecosystems to drive design-led manufacturing.

Q) What are some of the things India’s semiconductor ecosystem is getting right, and what are the areas for improvement?

Navin Bishnoi: There are three or four things that have started falling into place. The strongest is the stronger policy intent. We saw the impact ISM 1.0 created. The ecosystem is bubbling – not just with announcements, but with execution as well. Second is the acknowledgment that this will require bigger collaboration across different bodies, which includes not just government and industry bodies, but academia and research labs. And third, while the talent has been very focused on the design side, we need to scale into full ecosystem enablement.

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What we need to improve is how we solve the next problem. There is still scope to ask: how do startups get access to patient, deep-tech capital? And how do they get a stronger anchor demand – a path to market – so they can sell and then scale? A good thing is that a lot of this feedback is going into the 2.0 version of ISM. We probably need to not just double, but triple and quadruple the number of startup outcomes.

Q) From a semiconductor supply chain perspective, what key inroads can India make in the next 5-10 years?

Navin Bishnoi: The global environment has reinforced the importance of resilience, compliance, and a diversified innovation ecosystem. For many global semiconductor companies, including ours, that means building very strong R&D and execution capabilities across multiple regions. The large talent pool here is very deep-tech, with skills across product development, from practitioners to architects. And hence, what was an execution center has been converted into a major R&D base and, in many cases, a product creation hub.

Having deep researchers who can look not just at what’s needed today, but tomorrow and the day after – I call it an N plus one and N plus two vision of IP and technology – the goal is to move from execution into product ownership. So 5, 10, or 15 years down the line, I see critical product hubs of large companies, along with very niche, competitive startups and products from here, trying to solve what we need in digital infrastructure – not just for India, not just for the Global South, but from a global ownership perspective.

Q) How does Marvell’s AI silicon roadmap connect to India’s datacentre build-out?

Navin Bishnoi: If you look at the datacentre, fundamentally we have thought of it as compute – which is not incorrect, but it has been incomplete. There is a massive amount of compute, which needs to be connected and optimized at the system level. You need to process the data fast. But how can you move the data fast between compute, memory, the different storage, and across the networks?

Marvell is built on two product lines: merchant silicon and custom silicon. We provide end-to-end networking – whether it’s die-to-die, package-to-package, or chip-to-chip. You go from the tray to the rack, then connect server to server, rack to rack, and continent to continent. We have the solutions to connect from a few millimeters all the way to thousands of miles.

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Now, India is ramping up datacentres at a very fast pace – 50 megawatts, 100 megawatts, and beyond. And very quickly, we are realizing the kind of workloads we will see. We’ll start seeing engineering decisions, where, rather than just buying whole servers and racks, people ask: how can I engineer the solution that works best, not just in total cost, but power, performance, and efficiency? As these workloads get reviewed, we see that what was traditionally a merchant silicon footprint can start extending into custom compute and accelerator engagements.

Q) Every big tech AI company is launching its own custom ASIC. Do you see this as competition or as an opportunity?

Navin Bishnoi: Very clearly, we see this as an opportunity. The first deployment, even for hyperscalers, was just to get the racks and put them in. But the diverse use cases that hyperscalers are seeing are making them review the approach – instead of general-purpose GPUs, where the overall systems may not be best for their performance-per-watt and total cost of ownership, they are pushing for a balance between general-purpose and custom, homegrown silicon built for their workloads.

I have seen three generations of custom silicon – from the early days of networking and the internet, into the first round of datacentre and cloud, and now a third driven by AI. It is a very different mindset, because you start from the software, go to the architecture of the workload, and then build that custom platform. And it’s not just a custom GPU – what we call an XPU – but a lot of smaller attachments, which could be accelerators for security, crypto, and other workloads. Marvell Custom Silicon comes in as a partner for them – to provide the IP they need, the partnership on advanced process nodes with the fab, advanced packaging, and the design expertise.

Q) How is Marvell using AI internally to design chips and custom silicon?

Navin Bishnoi: When we build these AI-related chips, many of them have around 10 to 20 – now even 200 – billion transistors inside. And that’s at 2-nm and 3-nm nodes, going into deep geometry, advanced heterogeneous integration, and very complex packaging, under constrained power requirements as well as cost.

Then comes cycle time. Many hyperscalers and AI providers want a product out every year. Meanwhile, you take a couple of years to build a semiconductor, and you have to ensure that two or three years down the line, when it’s deployed, it still works with the new model data and API software. That’s where we realized that the AI we are creating through these chips can also help us design chips better and faster.

At Marvell, we acknowledged this much earlier. We do knowledge search, write code, build early circuits, do design debugging, and prepare documents for the customer. This gives us two things. First, it reduces cycle time. Second, it gives engineers more time to architect and bring in differentiation.

Q) Modern datacentre architecture is evolving with AI, how is Marvell contributing?

Navin Bishnoi: We initially created datacentres, and hence chips, that were born for a training purpose. When we say training, the models, tokens, and parameters were all in the trillions. You needed a humongous connected network that could distribute your training. But we quickly started seeing that we’re moving into the world of inference, where you and I do a prompt and get a response – whether it’s text, video, or audio.

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So combine training versus inference, and look at what will be done on-prem versus on-cloud – edge versus cloud. That is resulting in an architecture that is not just disaggregated, but very heterogeneous in nature. The inference workloads might fit into one XPU or multiple XPUs, which sit on a tray, on a server rack, or between two server racks. 

So what you had as a front-end network – scale-out and scale-across, which used to connect compute elements for training – now has to connect on the back end, between 4 XPUs versus 32 XPUs versus 100 XPUs, with very fast data movement and low latency.

Along with that, you see custom accelerators, custom XPUs, a combination of GPU, XPU, and CPU, along with fabrics. And then a huge bottleneck came from the memory and networking wall. Data isn’t moving fast enough, and we don’t have enough memory against each GPU or XPU. This is only just starting, and it will grow further as we realize what kinds of workloads will come.

Q) How to bridge India’s semiconductor talent gap?

Navin Bishnoi: We need talent at all levels. You need young engineers who bring in energy and different ways of solving problems. Just to give you our own example, Marvell has a full-fledged internship program where we hire many interns across multiple colleges and roles, giving them real-time exposure for six, nine, or eleven months. The second area is lateral talent. If we have to build a product team, what kind of talent or domain expertise is missing? That’s where our employees become brand ambassadors and bring in talent through referral programs. 

The third area is how we grow our internal teams to build them as the global leaders of the future – both technical and product leaders. We run development programs to build deep technical talent, so they can not just solve the most complex problems but also envision what will come in the next one to two years.

Q) How should people join the Indian semiconductor industry?

Navin Bishnoi: Semiconductors are the foundation of all the digital growth and infrastructure we are building. That should give anyone the confidence that you are the foundation of all the innovation and technology development that goes out. The second question is: there’s just too much AI – what happens with that? Having been in the industry for three decades, there have been many times when automation and efficiency improvements have come in. They have only helped engineers become better and faster, rather than making them irrelevant. The same is the case with AI.

So, for someone entering the industry, we still look at the foundational skills required to enter electrical, computer, and other domains. But having an awareness of how to leverage AI is a good competency to add. And last but not least, complex chip design is a huge collaboration story – across regions, people, domains, and skills. So having that collaborative attitude is the mindset we look forward to.

Q) What does a successful Marvell India story look like in the next five years?

Navin Bishnoi: We have already moved from execution to product ownership, and we are delivering that across a few of our product portfolios. The next step would be, with the growth of the AI datacentre and enterprise space, to have a strong product map alongside the growing ecosystem, and to contribute not just in terms of engineering execution, but also product delivery and revenue outcomes.

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