Intel Corp. yesterday revealed a new “low-power high-performance” processor microarchitecture for its future Bay Trail tablet and Merrifield smartphone Atom SoCs. The new architecture, Silvermont, is the first revision to the original Bonnel architecture of the first Atom chips from 2008. Silvermont also heralds a new tick-tock cadence for Intel’s mobile processor lineup, with the company alternating a new architecture and smaller fabrication every year.
Silvermont is based on a 22nm process (last generation’s Saltwell was on a 32nm process), using Tri-Gate non-planar 3D transistors for the first time in the mobile space. The first tablet Bay Trail Atom SoCs using Silvermont CPUs will released later this year, while the first Merrifield SoCs will be released in early 2014.
The next revision, using the same architecture as Silvermont, will be Airmont, based on a 14nm process, with the first chips scheduled to be released in 2014. The next revision (name still not disclosed) will maintain the 14nm process, but shall introduce a new architecture.
According to Intel, the Silvermont microarchitecture delivers exceptional performance-per-watt efficiency, offering 3X the peak performance of current-generation Saltwell Atom chips, or the same performance using 5X less power.
Silvermont is 64-bit capable, though whether it will be enabled in the SKU will depend on the intended application. The new architecture uses out-of-order execution, something that ARM Cortex A15 chips and the newest Qualcomm chips are using as well, promising lower latency and much improved single-thread performance. Because of this, Hyper Threading has also been done away with, further improving power efficiency. The Silvermont CPU is modular, and can be used in up to 8-core configurations.
Silvermont processors are expected to be clocked at anywhere between 2 to 2.4GHz. Intel has also finally introduced independent core frequencies support, despite its previous stance on the issue, joining Qualcomm. This would let Intel offer the ability to run each core in a Silvermont module at its own independent frequency. Unlike Qualcomm’s implementation, the independent frequency planes in Silvermont are optional, useful for certain low-cost chips.
Relevantly, Intel has also introduced Burst Technology 2.0, promising more dynamic and responsive scaling, apart from support for single and multi-core designs. Power-sharing with the GPU is also possible, further enabling frequency and power scaling.
Intel has also chosen to do away with the FSB interface with Silvermont, using the in-die interconnect (IDI) tech seen in its Core processors. With a lower overhead, gains are seen in both single and multi-threaded performance. Finally, an updated system agent on the North Bridge enables reordering of memory requests to optimize performance quality.
As for graphics, so far only details about Bay Trail tablet SoCs are certain, which will offer Intel’s Gen 7 graphics first seen in the Ivy Bridge chipset. Overall, Intel's released benchmarks show a significant edge over the unnamed competition's yet-to-be released offerings, which should realistically include Qualcomm, Nvidia, Apple and ARM designs. Of course, we'll have to wait for actual performance comparisons between devices bearing these chipsets to correctly assess the gap.
The Silvermont microarchitecture will be offered in more than just tablet and mobile processors, with Intel announcing communications infrastructure product (Rangeley), microserver (Avoton), and automotive (unannounced) implementations. For an exhaustive analysis of the generational changes Silvermont brings, refer to the source.
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