Intel Foveros 3D Logic Chip Stacking, next-gen Sunny Cove CPU Architecture, Intel Gen11 Integrated Graphics and more announced

By Digit NewsDesk | Published on Dec 13 2018
Intel Foveros 3D Logic Chip Stacking, next-gen Sunny Cove CPU Architecture, Intel Gen11 Integrated Graphics and more announced

At its Architecture Day, Intel made announcements on many new technologies on which company’s future products will be based upon.

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Intel, at its Architecture Day event, announced some of its new technologies and innovations. Most notable of the lot was the announcement of a 3D logic chip packaging technology called “Foveros,” and the next generation ‘Sunny Cove’ architecture, upon which upcoming Intel chips will be manufactured. Foveros is said to enable logic-on-logic integration with 3D stacking to enable “high-performance, high-density and low-power” silicon process technologies. Meanwhile, Intel’s new CPU microarchitecture has been designed to increase performance per clock and power efficiency for general purpose computing tasks. It also focuses on new features that are aimed at improving tasks like AI and cryptography. Alongside the two major announcements, the chip maker also announced its next-generation Gen11 integrated graphics, the “One API” project, updates on Intel Optane technology, and released a Deep Learning Reference Stack for Xeon Scalable platforms. 

Foveros 3D Stacking:

An interesting tidbit in Foveros is the introduction of “chiplets,” which basically is the fragmentation of CPU into its individual parts. Intel says that products will be broken up into these chiplets where “ I/O, SRAM and power delivery circuits can be fabricated in a base die and high-performance logic chiplets are stacked on top.”

Intel expects to bring new devices using Foveros by the second half of 2019 and the first Foveros product will combine a 10nm compute-stacked chiplet with a low-power 22FFL base die. “It will enable the combination of world-class performance and power efficiency in a small form factor. Foveros is the next leap forward following Intel’s breakthrough Embedded Multi-die Interconnect Bridge (EMIB) 2D packaging technology, introduced in 2018,” says Intel. 

Sunny Cove CPU Architecture:

Coming Intel’s next-generation CPU microarchitecture, Sunny Cove, it is said to enable reduced latency and higher throughput, along with greater parallelism. As mentioned earlier, the new architecture has been designed to increase performance per clock and power efficiency for general purpose computing tasks and also comes with new features that are supposed to give a boost to AI and cryptography related tasks. 

The new design will feature “enhanced” microarchitecture that is said to execute more operations in parallel. It will also use new algorithms to lower latency and come with increased key buffers and cache sizes for better handle data-centric workloads. Since the new architecture also aims at delivering better performance, it will feature architectural extensions for specific use cases and algorithms. As an example, Intel says that it will exhibit boosted processing for cryptography and in other cases like compression and decompression.

Intel Gen11 Integrated Graphics:

Intel also unveiled its next generation of integrated graphics solution, Gen11, which comes with 64 enhanced execution units and is said to break the 1 TFLOPS barrier. The company says that the Gen11 integrated graphics features double EUs than its previous Gen9 graphics and will be paired with 10nm-based processors, beginning in 2019. The new graphics solution by the chip manufacturer might also increase game playability and feature an “advanced” media encoder and decoder. It will support 4K video streams and 8K content creation, however, in constrained power envelopes. Intel Adaptive Sync technology will also be implemented in Gen11 for enabling smoother frame rates while gaming. The company also reiterated its plans to introduce a discrete graphics processor by 2020 but didn’t provide any details. 

Other Announcements by Intel:

“One API” Software: The One API project has been announced to make programming of computing engines across CPU, GPU, FPGA, AI and other accelerators easier. The new software will come with a set of developer tools for mapping software to the hardware that can help best accelerate the code. A public project release is expected to be available in 2019.

Memory and Storage: Coming to Intel Optane technology and the products that are based upon it, Intel announced the Intel Optane DC persistent memory, which is a new product touted to converge “memory-like performance with the data persistence and large capacity of storage.” This new tech is said to bring data closer with the CPU for faster processing and this will help in faster processing of AI and large databases. Describing the new tech, Intel says, “Intel Optane DC persistent memory delivers cache line (64B) reads to the CPU. On average, the average idle read latency with Optane persistent memory is expected to be about 350 nanoseconds when applications direct the read operation to Optane persistent memory, or when the requested data is not cached in DRAM. For scale, an Optane DC SSD has an average idle read latency of about 10,000 nanoseconds (10 microseconds), a remarkable improvement.”  

Deep Learning Reference Stack: Intel has released an integrated, open source stack that is optimized for Intel Xeon Scalable platforms called the Deep Learning Reference Stack. The new open source community release is part of the company’s effort to get AI developers easy access to all features and functionality of its platforms. The Deep Learning Reference Stack is built for cloud-native environments.


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