We have moved well past fitting stuff onto the head of a pin now. Technology has now advanced so far that you could balance a couple of thousand transistors on one end of your split hair.
But we want to go further.
Scientists from the Universities of Nottingham and Southampton have demonstrated a remarkable process using which they will be able to create features in the <10nm scale! Using this technique they were able to create nanowires of a mere 3nm!
The innovative technique relies on the unique and flexible properties of supercritical fluids to push the limits of electrodeposition.
Electrodeposition is the process by which electroplating is achieved. Electroplating is used for a variety of purposes, and involves coating metals and other materials with a fine layer of another metal. The circuits on electronic circuit boards (for example) are etched using this process.
During electrodeposition, a conductive surface can be coated by another metal by making it the cathode of an electric cell, and immersing it in a solution of a salt of the metal that needs to be deposited. The anode is also made of the metal to be deposited.
The problems occur when one tries to deposit circuits of the nano scale. Firstly to a measure to control where the deposition occurs needs to be adopted. Also when using salt solutions of normal liquids like water -- there are limits to how small the deposited layer can be, because due to the surface tension of these liquids, they are unable to successfully deposit in such nano-scale areas.
What the new technique does is utilize supercritical fluids, which have a nearly zero surface tension. These fluids are obtained using a combination of high pressure and temperature, at the critical point of the substance, where it shows behavior intermediate between liquids and gases. The research used supercritical CO2 with the polar solvent difluoromethane, and were able to create features in the nano scale. Wires of 3nm to 10nm were created by deposition of copper in the pores in SiO2 (silicon oxide).
This research stands to have a great impact on the development of chips of the future. With
fabrications processes moving towards smaller and smaller sizes, and chips with 32nm and smaller sizes in the offing. While the technology is not a solution to the issues such as quantum tunneling which start to become important factors at that scale, it can take us through the next few generation of processors by enabling processes smaller than 10nm. With this technology we will be able to take computers to the nano electronics era, without traversing away from semiconductors.