AMD showcases Bulldozer and Bobcat processor architectures

By Abhinav Lal Published Date
25 - Aug - 2010
| Last Updated
25 - Aug - 2010
AMD showcases Bulldozer and Bobcat processor architectures

Advanced Micro Devices, or AMD, just showed off its next-gen processor technology at the Hot Chips 2010 conference in Silicon Valley, detailing the evolved nature of its upcoming Bulldozer and Bobcat lineup of chips (check out the video at the end of the article).

"The new [cores], codenamed 'Bulldozer' for high-performance PC and server markets, and 'Bobcat' for low-power notebook and small form-factor desktop markets, were designed from the ground-up to address specific requirements and compute workloads," said Chekib Akrout, a Senior VP at AMD.

AMD has apparently taken its x86 processor technology to the next level, radically evolving its core designs from the first time since the original Opteron x86 and K7 processors. To highlight this new ground-up approach, Akrout went on to say: "x86 architecture lies at the very heart of computing and AMD has continuously evolved and improved its core designs. The Bulldozer and Bobcat cores continue that evolutionary path and are designed to change the user's experience with the resulting products."

One of the biggest features of the new Bulldozer architecture is that it will support a new sort of SMT (simultaneous multithreading) and not the traditional CMP (chip multi-processing). This will finally allow two or more threads to run on a single core, working simultaneously. How this technology compares to Intel’s Hyper-Threading is not yet known, though it has been noted that with AMD’s novel SMT approach, two threads will share a single front-end, but, use separate integer execution resources. According to Ars Technica’s Jon Stokes, for this type of SMT to work, all shared code and data storage components of the processor must be “either replicated or partitioned”, giving equal priority to each thread when sharing resources, in such a way that buffer entries don’t remain empty when there’s no second thread.

For all this extra “storage and bookkeeping”, SMT theoretically requires a bigger die area and higher power budget, an acceptable trade-off when you consider the wasted processor cycles while waiting for main memory without SMT. All this would make power consumption very dependent on the type of workload, as well as the performance and tuning of the core’s cache hierarchy.

SMT is obviously great for multithreaded applications and workloads, where a two-way SMT core is significantly more efficient than an equivalent dual-core processor, bottlenecked not by main memory, but only by the availability of execution resources. However, for more conventional, single-threaded workloads, a single two-way SMT core would work as well as 1.3 (up to 1.7 in some estimates) single-cores, performing less efficiently than earlier because of its extra hardware.

AMD’s way around the execution unit bottleneck is to simply duplicate the storage units and integer execution hardware, giving each thread its own register file and integer units, and bulking up the processor. This is probably the reason why the processor family was codenamed Bulldozer. This is phenomenally different from conventional SMT core designs, which used to only duplicate the storage units for each thread.

From all this information, not many definitive statements can be made about the Bulldozer family of processors, but you can safely expect some rather fantastic floating-point performance, especially if there’s sufficient memory bandwidth.

Meanwhile, the Bobcat lineup, while great for laptops and tablets, might just be AMD’s best bet to take on ARM’s Eagle lineup in the high-density cloud server market, the wave of the future.

Here are some of the new features of the two new processor families from AMD:

Codename Bulldozer

  • Multithreaded compute performance balancing both dedicated & shared compute resources that allows for highly synthesizable processors that are highly compact and have high core count design
  • New x86 instruction support (SSE4.1, SSE4.2, AVX, and XOP including 4-operand FMAC).
  • Advanced power management features
  • Manufactured on 32nm process technology

Codename Bobcat

  • Sub-one-watt capable operation
  • Out-of-order instruction execution for higher performance
  • Can provide an estimated 90 percent of today's mainstream PC performance in less than half the area
  • Low-power optimized core power gating and a micro-architecture
  • Easy to synthesize design that can use a variety of manufacturing technologies

So it really seems as if AMD has all future bases covered, from desktop, server, and laptop to tablet markets, especially if you include the Fusion Accelerated Procession Unit (APU).

Abhinav LalAbhinav Lal