A team of researchers from Stanford University have built a multi-layered "high-rise" chip using Nanotechnology that could outperform traditional computer chips, taking on the hefty workloads that will be needed for the Internet of Things and big data.
The new 3D chips are built with layers of processing on top of layers of memory, greatly cutting down on the time and energy typically needed to move information from memory to processing and back. The team used carbon nanotube transistors instead of silicon and replaced typical memory with resistive random-access memory (RRAM) or spin-transfer torque magnetic random-access memory (STT-RAM) which use less power and are more efficient than traditional memory systems. Scientists were able to build the logic and memory technologies in layers that sit on top of each other in what scientists describe as "high-rise" structures.
Max Shulaker, a researcher on the project and a Ph.D candidate in Stanford's Department of Electrical Engineering stated, "The connectivity between the layers increases by three orders of magnitude or a thousand times the benefit in bandwidth of how much data you can move back and forth. For all of these Internet of Things applications, all of them would run much, much more efficiently and much, much faster. For way less energy, you'd be able to do way more work." He added that team had built a four layer chip, but he could easily visualize making a 100 layer chip if needed in the future.
The research is being led by Subhasish Mitra, professor of electrical engineering and computer science at Stanford. “This research is at an early stage but our design and fabrication techniques are scalable. With further development this architecture could lead to computing performance that is much, much greater than anything available today,” Subhasish added.
H.S. Philip Wong from Stanford’s school of engineering stated that the prototype chip shows how to put logic and memory together into 3D structures that can be mass-produced. "Paradigm shift is an overused concept, but here it is appropriate," Wong said. "With this new architecture, electronics manufacturers could put the power of a supercomputer in your hand."
Subhasish Mitra and Philip Wong presented their paper at the “IEEE International Electron Devices Meeting” in San Francisco this week.
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